MT53B128M32D1NP-062 WT:A Micron
Brand:
JEDEC Compliance:
JEDEC LPDDR4X compliant
ECC Support:
Inline ECC supported
Process Technology:
1X nm mobile DRAM
Power Saving Features:
DVFS, Deep Sleep, Self Refresh
Bank Architecture:
Multi-bank LPDDR4X architecture
Refresh Mode:
Auto Refresh / Self Refresh
Temperature Grade:
Wide Temperature Grade
Pin/Ball Count:
200 balls
Package Size:
200-ball FBGA
VDD/VDDQ:
VDD1=1.8V / VDD2=1.1V / VDDQ=0.6V
Clock Frequency:
1600 MHz
Organization:
128M ×32
Density:
4Gb
Data Rate:
3200 MT/s
I/O Width:
x32
Package Type:
FBGA
Interface Standard:
LPDDR4X SDRAM
Operating Temperature Range:
-40°C to +95°C
Model:
Order Number:
MT53B128M32D1NP-062 WT:A
Description:
Micron LPDDR4 mobile DRAM optimized for ultra-low power operation, high-speed memory access, and compact integration in smartphones, tablets, automotive infotainment, and portable AI devices.
Product parameters
| Product attributes | Attribute value | Filter product attributes |
|---|---|---|
| Brand: | Micron | |
| JEDEC Compliance: | JEDEC LPDDR4X compliant | |
| ECC Support: | Inline ECC supported | |
| Process Technology: | 1X nm mobile DRAM | |
| Power Saving Features: | DVFS, Deep Sleep, Self Refresh | |
| Bank Architecture: | Multi-bank LPDDR4X architecture | |
| Refresh Mode: | Auto Refresh / Self Refresh | |
| Temperature Grade: | Wide Temperature Grade | |
| Pin/Ball Count: | 200 balls | |
| Package Size: | 200-ball FBGA | |
| VDD/VDDQ: | VDD1=1.8V / VDD2=1.1V / VDDQ=0.6V | |
| Clock Frequency: | 1600 MHz | |
| Organization: | 128M ×32 | |
| Density: | 4Gb | |
| Data Rate: | 3200 MT/s | |
| I/O Width: | x32 | |
| Package Type: | FBGA | |
| Interface Standard: | LPDDR4X SDRAM | |
| Operating Temperature Range: | -40°C to +95°C |
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