Samsung
Results: 44
Brand
JEDEC Compliance
- JEDEC DDR3 compliant
- JEDEC DDR3L
- JEDEC DDR4 compliant
- JEDEC LPDDR4X compliant
- JEDEC DDR4
- JEDEC LPDDR5 compliant
- JEDEC DDR5 compliant
- JEDEC LPDDR5 + UFS 3.1 compliant
- JEDEC LPDDR5X + UFS 3.1 compliant
- JEDEC LPDDR5X compliant
- GDDR6 JEDEC
- JEDEC GDDR6 compliant
- JESD209-4 LPDDR4
- JEDEC Mobile DDR compliant
ECC Support
Process Technology
- 1x nm Class
- 1x nm DRAM
- 2x nm DRAM
- Samsung advanced LPDDR5 node
- 10nm-class DRAM
- 10nm-class mobile DRAM
- Samsung 10nm-class LPDDR5 process
- 10nm-class graphics DRAM
- Samsung 10nm-class DRAM process (E-die generation)
- Samsung 12nm-class LPDDR5X process
- 12nm-class mobile DRAM process
- 14nm/12nm-class DRAM
- 20nm-class DRAM
- 30nm-class DRAM
- 30nm-class DRAM process
- Mobile DRAM process
- Samsung advanced DRAM node
- Samsung advanced mobile DRAM node
- Samsung mobile DRAM process
Power Saving Features
- DVFS, Deep Sleep, Self Refresh
- Deep Power Down, Self Refresh
- Deep Sleep, DVFS, Self Refresh
- Deep Sleep,Self Refresh
- Low Power Modes, Dynamic Refresh
- Partial Array Self Refresh (PASR), Deep Power Down
- Power-Down Mode, Self Refresh, DLL-off Mode
- Power-Down Mode, Self Refresh, Deep Power Saving
- Power-Down, Self Refresh, DFE
- Power-Down, Self Refresh, DLL-off
- Power-Down, Self Refresh, Decision Feedback Equalization (DFE)
- Self Refresh, PASR, Power-Down
- Self Refresh, Power-Down Mode
Bank Architecture
Temperature Grade
Pin/Ball Count
Package Size
VDD/VDDQ
Clock Frequency
Organization
Density
Data Rate
I/O Width
Interface Standard
Operating Temperature Range
Product
| Image | Brand | Title | Operating Temperature Range | Interface Standard | Package Type | I/O Width | Data Rate | Density | Organization | Clock Frequency | VDD/VDDQ | Package Size | Pin/Ball Count | Temperature Grade | Refresh Mode | Bank Architecture | Power Saving Features | Process Technology | ECC Support | JEDEC Compliance |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Samsung Semiconductor | K4ZAF325BC-SC16 | 0°C to +95°C | GDDR6 SDRAM | FBGA | x32 | 16 Gb/s | 8Gb | 256M × 32 | 2000 MHz | 1.35V | 14 × 12 mm | 180-ball | Commercial | Auto Refresh | 16 Banks | Deep Power Down, Self Refresh | 10nm-class DRAM | On-die ECC | GDDR6 JEDEC | |
| Samsung Semiconductor | K4B4G1646E-BCNB000 | 0°C to +95°C | DDR3L SDRAM | FBGA | x16 | 1866 MT/s | 4Gb | 256M × 16 | 933 MHz | 1.35V / 1.5V | 8 × 14 mm | 96-ball | Commercial | Auto Refresh / Self Refresh | 8 Banks | Self Refresh, PASR, Power-Down | 2x nm DRAM | No | JEDEC DDR3L | |
| Samsung Semiconductor | K4A8G165WG-BCWE | 0°C to +95°C | DDR4 SDRAM | FBGA | x16 | 3200 MT/s | 8Gb | 512M × 16 | 1600 MHz | 1.2V | 9 × 14 mm | 96-ball | Commercial | Auto Refresh / Self Refresh | 16 Banks / 4 Bank Groups | Self Refresh, Power-Down Mode | 1x nm DRAM | No | JEDEC DDR4 | |
| Samsung Semiconductor | K4F8E3S4HB-MHCJ | 0C to +95C | LPDDR4 | FBGA-200 | x16 | 4266 MT/s | 8Gb | 512M x16 | 2133 MHz | 1.1V/1.1V | 10×14.5 mm | 200 Balls | Commercial | Auto Refresh,Self Refresh | 8 Banks | Deep Sleep,Self Refresh | 1x nm Class | No | JESD209-4 LPDDR4 | |
| Samsung Semiconductor | K4B4G1646E-BCNB Samsung | 0°C to +85°C | DDR3 SDRAM | FBGA | x16 | 1866 Mbps | 4Gb | 256M x16 | 933 MHz | VDD=1.5V ±0.075V / VDDQ=1.5V ±0.075V | 96-ball FBGA | 96 balls | Commercial | Auto Refresh / Self Refresh | 8 Banks | Power-Down Mode, Self Refresh, Deep Power Saving | 30nm-class DRAM process | No | JEDEC DDR3 compliant | |
| Samsung Semiconductor | K4A4G165WG-BCWE Samsung | 0°C to +85°C | DDR4 SDRAM | FBGA | x16 | 3200 Mbps | 4Gb | 256M ×16 | 1600 MHz | 1.2V / 1.2V | 9 × 8 × 1.2 mm | 96-ball | Commercial Grade | Auto Refresh / Self Refresh | 16 Banks / 4 Bank Groups | Power-Down Mode, Self Refresh, DLL-off Mode | Samsung 10nm-class DRAM process (E-die generation) | No | JEDEC DDR4 compliant | |
| Samsung Semiconductor | K3LK5K50BM-BGCP Samsung | -25°C to +85°C | LPDDR5 + UFS 3.1 | uMCP FBGA | x64 (LPDDR5 DRAM bus) | 6400 Mbps | 128Gb (uMCP total class) | LPDDR5 + UFS integrated | 3200 MHz | 1.8V / 1.05V / 0.9V / 0.5V | 297-FBGA package class | 297 balls | Commercial Grade | Auto Refresh / Self Refresh | Multi-bank LPDDR5 architecture | Deep Sleep, DVFS, Self Refresh | Samsung 10nm-class LPDDR5 process | No | JEDEC LPDDR5 + UFS 3.1 compliant | |
| Samsung Semiconductor | K3LK6K60BM-BGCP Samsung | -25°C to +85°C | LPDDR5 + UFS 3.1 | uMCP FBGA | x64 | 6400 Mbps | uMCP (LPDDR5 + UFS 3.1) | LPDDR5 + UFS integrated | 3200 MHz | 1.8V / 1.05V / 0.5V | 297-FBGA class | 297 balls | Commercial Grade | Auto Refresh / Self Refresh | Multi-bank LPDDR5 architecture | DVFS, Deep Sleep, Self Refresh | Samsung 10nm-class LPDDR5 process | No | JEDEC LPDDR5 + UFS 3.1 compliant | |
| Samsung Semiconductor | K3LK7K70BM-BGCP Samsung | -25°C to +85°C | LPDDR5 + UFS 3.1 | uMCP FBGA | x64 | 6400 Mbps | uMCP (LPDDR5 + UFS 3.1) | LPDDR5 + UFS integrated | 3200 MHz | 1.8V / 1.05V / 0.5V | 297-FBGA class | 297 balls | Commercial Grade | Auto Refresh / Self Refresh | Multi-bank LPDDR5 architecture | DVFS, Deep Sleep, Self Refresh | Samsung 10nm-class LPDDR5 process | No | JEDEC LPDDR5 + UFS 3.1 compliant | |
| Samsung Semiconductor | K3LKBKB0BM-MGCP Samsung | -25°C to +85°C | LPDDR5 + UFS 3.1 | uMCP FBGA | x64 | 7500 Mbps | uMCP (LPDDR5 + UFS 3.1) | LPDDR5 + UFS integrated | 3750 MHz | 1.8V / 1.05V / 0.5V | 297-FBGA class | 297 balls | Commercial Grade | Auto Refresh / Self Refresh | Multi-bank LPDDR5 architecture | DVFS, Deep Sleep, Self Refresh | Samsung 12nm-class LPDDR5X process | No | JEDEC LPDDR5X + UFS 3.1 compliant | |
| Samsung Semiconductor | K3LKCKC0BM-MGCP Samsung | -25°C to +85°C | LPDDR5X + UFS 3.1 | uMCP FBGA | x64 | 8533 Mbps | uMCP (LPDDR5X + UFS 3.1) | LPDDR5X + UFS integrated | 4266 MHz | 1.8V / 1.05V / 0.5V | 297-FBGA class | 297 balls | Commercial Grade | Auto Refresh / Self Refresh | Multi-bank LPDDR5X architecture | DVFS, Deep Sleep, Self Refresh | Samsung 12nm-class LPDDR5X process | No | JEDEC LPDDR5X + UFS 3.1 compliant | |
| Samsung Semiconductor | K4A4G085WF-BIWE Samsung | 0°C to +85°C | DDR4 SDRAM | FBGA | x8 | 3200 Mbps | 4Gb | 512M ×8 | 1600 MHz | 1.2V / 1.2V | 78-ball FBGA | 78 balls | Commercial Grade | Auto Refresh / Self Refresh | 16 Banks / 4 Bank Groups | Power-Down, Self Refresh, DLL-off | 10nm-class DRAM | No | JEDEC DDR4 compliant | |
| Samsung Semiconductor | K4A4G165WF-BCTD Samsung | 0°C to +85°C | DDR4 SDRAM | FBGA | x16 | 2666 Mbps | 4Gb | 256M ×16 | 1333 MHz | 1.2V / 1.2V | 96-ball FBGA | 96 balls | Commercial Grade | Auto Refresh / Self Refresh | 16 Banks / 4 Bank Groups | Power-Down, Self Refresh, DLL-off | 10nm-class DRAM | No | JEDEC DDR4 compliant | |
| Samsung Semiconductor | K4A4G165WF-BIWE Samsung | 0°C to +85°C | DDR4 SDRAM | FBGA | x16 | 3200 Mbps | 4Gb | 256M ×16 | 1600 MHz | 1.2V / 1.2V | 96-ball FBGA | 96 balls | Commercial Grade | Auto Refresh / Self Refresh | 16 Banks / 4 Bank Groups | Power-Down, Self Refresh, DLL-off | 10nm-class DRAM | No | JEDEC DDR4 compliant | |
| Samsung Semiconductor | K4A8G165WB-BCRC Samsung | 0°C to +85°C | DDR4 SDRAM | FBGA | x16 | 2400 Mbps | 8Gb | 512M ×16 | 1200 MHz | 1.2V / 1.2V | 96-ball FBGA | 96 balls | Commercial Grade | Auto Refresh / Self Refresh | 16 Banks / 4 Bank Groups | Power-Down, Self Refresh, DLL-off | 20nm-class DRAM | No | JEDEC DDR4 compliant | |
| Samsung Semiconductor | K4A8G165WC-BCTD Samsung | 0°C to +85°C | DDR4 SDRAM | FBGA | x16 | 2666 Mbps | 8Gb | 512M ×16 | 1333 MHz | 1.2V / 1.2V | 96-ball FBGA | 96 balls | Commercial Grade | Auto Refresh / Self Refresh | 16 Banks / 4 Bank Groups | Power-Down, Self Refresh, DLL-off | 10nm-class DRAM | No | JEDEC DDR4 compliant | |
| Samsung Semiconductor | K4A8G165WC-BCWE Samsung | 0°C to +85°C | DDR4 SDRAM | FBGA | x16 | 3200 Mbps | 8Gb | 512M ×16 | 1600 MHz | 1.2V / 1.2V | 96-ball FBGA | 96 balls | Commercial Grade | Auto Refresh / Self Refresh | 16 Banks / 4 Bank Groups | Power-Down, Self Refresh, DLL-off | 10nm-class DRAM | No | JEDEC DDR4 compliant | |
| Samsung Semiconductor | K4A8G165WC-BITD Samsung | 0°C to +85°C | DDR4 SDRAM | FBGA | x16 | 3200 Mbps | 8Gb | 512M ×16 | 1600 MHz | 1.2V / 1.2V | 96-ball FBGA | 96 balls | Commercial Grade | Auto Refresh / Self Refresh | 16 Banks / 4 Bank Groups | Power-Down, Self Refresh, DLL-off | 10nm-class DRAM | No | JEDEC DDR4 compliant | |
| Samsung Semiconductor | K4AAG085WA-BCWE Samsung | 0°C to +85°C | DDR5 SDRAM | FBGA | x8 | 5600 Mbps | 16Gb | 2G ×8 | 2800 MHz | VDD=1.1V / VDDQ=1.1V | 78-ball FBGA | 78 balls | Commercial Grade | Auto Refresh / Self Refresh | 32 Banks / 8 Bank Groups | Power-Down, Self Refresh, Decision Feedback Equalization (DFE) | 14nm/12nm-class DRAM | On-die ECC | JEDEC DDR5 compliant | |
| Samsung Semiconductor | K4AAG165WA-BCWE Samsung | 0°C to +85°C | DDR5 SDRAM | FBGA | x16 | 5600 Mbps | 16Gb | 1G ×16 | 2800 MHz | VDD=1.1V / VDDQ=1.1V | 96-ball FBGA | 96 balls | Commercial Grade | Auto Refresh / Self Refresh | 32 Banks / 8 Bank Groups | Power-Down, Self Refresh, DFE | 14nm/12nm-class DRAM | On-die ECC | JEDEC DDR5 compliant |





























































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