K3LKCKC0BM-MGCP Samsung
Brand:
JEDEC Compliance:
JEDEC LPDDR5X + UFS 3.1 compliant
ECC Support:
No
Process Technology:
Samsung 12nm-class LPDDR5X process
Power Saving Features:
DVFS, Deep Sleep, Self Refresh
Bank Architecture:
Multi-bank LPDDR5X architecture
Refresh Mode:
Auto Refresh / Self Refresh
Temperature Grade:
Commercial Grade
Pin/Ball Count:
297 balls
Package Size:
297-FBGA class
VDD/VDDQ:
1.8V / 1.05V / 0.5V
Clock Frequency:
4266 MHz
Organization:
LPDDR5X + UFS integrated
Density:
uMCP (LPDDR5X + UFS 3.1)
Data Rate:
8533 Mbps
I/O Width:
x64
Package Type:
uMCP FBGA
Interface Standard:
LPDDR5X + UFS 3.1
Operating Temperature Range:
-25°C to +85°C
Model:
K3LKCKC0BM-MGCP
Order Number:
K3LKCKC0BM-MGCP
Description:
Samsung high-performance LPDDR5 DRAM providing fast data access, reduced standby power, and reliable operation for premium mobile devices, portable gaming systems, and advanced embedded applications.
Product parameters
| Product attributes | Attribute value | Filter product attributes |
|---|---|---|
| Brand: | Samsung Semiconductor | |
| JEDEC Compliance: | JEDEC LPDDR5X + UFS 3.1 compliant | |
| ECC Support: | No | |
| Process Technology: | Samsung 12nm-class LPDDR5X process | |
| Power Saving Features: | DVFS, Deep Sleep, Self Refresh | |
| Bank Architecture: | Multi-bank LPDDR5X architecture | |
| Refresh Mode: | Auto Refresh / Self Refresh | |
| Temperature Grade: | Commercial Grade | |
| Pin/Ball Count: | 297 balls | |
| Package Size: | 297-FBGA class | |
| VDD/VDDQ: | 1.8V / 1.05V / 0.5V | |
| Clock Frequency: | 4266 MHz | |
| Organization: | LPDDR5X + UFS integrated | |
| Density: | uMCP (LPDDR5X + UFS 3.1) | |
| Data Rate: | 8533 Mbps | |
| I/O Width: | x64 | |
| Package Type: | uMCP FBGA | |
| Interface Standard: | LPDDR5X + UFS 3.1 | |
| Operating Temperature Range: | -25°C to +85°C |
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