K3LK5K50BM-BGCP Samsung
Product parameters
| Product attributes | Attribute value | Filter product attributes |
|---|---|---|
| Brand: | Samsung Semiconductor | |
| JEDEC Compliance: | JEDEC LPDDR5 + UFS 3.1 compliant | |
| ECC Support: | No | |
| Process Technology: | Samsung 10nm-class LPDDR5 process | |
| Power Saving Features: | Deep Sleep, DVFS, Self Refresh | |
| Bank Architecture: | Multi-bank LPDDR5 architecture | |
| Refresh Mode: | Auto Refresh / Self Refresh | |
| Temperature Grade: | Commercial Grade | |
| Pin/Ball Count: | 297 balls | |
| Package Size: | 297-FBGA package class | |
| VDD/VDDQ: | 1.8V / 1.05V / 0.9V / 0.5V | |
| Clock Frequency: | 3200 MHz | |
| Organization: | LPDDR5 + UFS integrated | |
| Density: | 128Gb (uMCP total class) | |
| Data Rate: | 6400 Mbps | |
| I/O Width: | x64 (LPDDR5 DRAM bus) | |
| Package Type: | uMCP FBGA | |
| Interface Standard: | LPDDR5 + UFS 3.1 | |
| Operating Temperature Range: | -25°C to +85°C |

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