MT53E512M32D1ZW-046 WT:B Micron
Brand:
JEDEC Compliance:
Yes (JESD209-4B)
ECC Support:
No (On-die ECC not available)
Process Technology:
1x nm FinFET CMOS
Power Saving Features:
Ultra-low voltage operation, partial array self refresh, temperature-controlled refresh, clock stop mode
Bank Architecture:
16 internal banks (8 banks per channel)
Refresh Mode:
Auto refresh, self refresh, partial array self refresh
Temperature Grade:
Wide Temperature
Pin/Ball Count:
200
Package Size:
10mm x 14.5mm
VDD/VDDQ:
VDD1: 1.8V, VDD2: 1.1V, VDDQ: 0.6V
Clock Frequency:
2.133GHz
Organization:
512M x 32
Density:
16Gb
Data Rate:
4266MT/s
I/O Width:
32-bit
Package Type:
TFBGA
Interface Standard:
LPDDR4X SDRAM
Operating Temperature Range:
-25°C to +85°C
Model:
MT53E512M32D1ZW-046 WT:B
Order Number:
MT53E512M32D1ZW-046 WT:B
Description:
LPDDR4X SDRAM, 16Gbit, 512M x 32, 4266MT/s, 1.1V/0.6V, -25°C to +85°C, 200-ball TFBGA, Wide Temperature Grade
Product parameters
| Product attributes | Attribute value | Filter product attributes |
|---|---|---|
| Brand: | Micron | |
| JEDEC Compliance: | Yes (JESD209-4B) | |
| ECC Support: | No (On-die ECC not available) | |
| Process Technology: | 1x nm FinFET CMOS | |
| Power Saving Features: | Ultra-low voltage operation, partial array self refresh, temperature-controlled refresh, clock stop mode | |
| Bank Architecture: | 16 internal banks (8 banks per channel) | |
| Refresh Mode: | Auto refresh, self refresh, partial array self refresh | |
| Temperature Grade: | Wide Temperature | |
| Pin/Ball Count: | 200 | |
| Package Size: | 10mm x 14.5mm | |
| VDD/VDDQ: | VDD1: 1.8V, VDD2: 1.1V, VDDQ: 0.6V | |
| Clock Frequency: | 2.133GHz | |
| Organization: | 512M x 32 | |
| Density: | 16Gb | |
| Data Rate: | 4266MT/s | |
| I/O Width: | 32-bit | |
| Package Type: | TFBGA | |
| Interface Standard: | LPDDR4X SDRAM | |
| Operating Temperature Range: | -25°C to +85°C |
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